Verification has been and still are the one of the most challenging tasks in electronic design. 40-70% of the project time is spent on verification. Even with better verification methodology and tools this number has not decreased due to increased design complexity. ISS has a long experience in introducing new verification methodologies like Emulation, Code coverage, Cycle-based simulation, Formal verification, Coverage driven verification and now Functional Qualification. You will find information related to verification methodology and tools in this section.