High Density Boards

boards are getting more crowded

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Today, printed circuit boards are getting smaller and smaller and are becoming more and more densely populated. When these designs flow through the life-cycle of the development process, three problems quickly become apparent:
  1. Loss of Physical Access - One characteristic of high density boards is that they incorporate BGA packaging technology where there are no leads coming off the chip or through the board. This makes physical access to the device for testing very difficult.
  2. Number of Nets - A large majority of high-density boards include in excess of 3,000 different nets. To use traditional testing methods, the designer must incorporate a large number of test points and in many cases, the number of test points exceeds the limitation of many In-circuit testers.
  3. Fixturing - Long lead times to build complex fixtures means that boards can not be debugged until after the fixture is built. At approximately $10/nail for a fixture for a high-density board, fixtures can cost between $30-$100K. Both issues negatively impact the design project.

JTAG boundary-scan tools give back the access that BGAs would otherwise take away and help reduce the number of physical testpoints (thus cost) that are required to test the printed circuit board. Less testpoints means fixtures can be less complex, completed sooner, and less costly. Also, boundary scan enables test engineers to develop and debug tests before fixtures are built. In some cases, using high test coverage, there is no need for fixtures or ICT.
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