Accelerate C-Functions
Automated Debug
Correct-by-Construction
ESL Methodology
Functional Qualification
HW/SW Profiling
Virtual HW Models
Visibility Automation

Micrologic

VisualDRC

http://www.micrologic-da.com/  Print this page Contact us Tip a colleague about this page


Interactive Correct-by-Construction Tools for Design and Verification of Nanometer ICs

  • Correct-by-construction design of custom chips is the EDA dream. And Micrologic is making the dream come true for you.

  • Our tools seamlessly integrate with Cadence Virtuoso® and other design EDA systems to bring your custom IC design environment a giant step ahead towards correct-by-construction perfection.

  • Do you need to consistently bring your nanometer custom chip designs to signoff faster with fewer design cycles, greater reliability and higher performance?