CPLD/FPGA

reprogrammable logic on the boards

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PROBLEM
In-System Configuration (also known as In-System Programming (ISP) or on-board programming) is the process of programming CPLDs (complex programmable logic devices) after they have been soldered to a board. ISC is accomplished using tools provided by programmable device vendors, on ATE/ICT testers, or by PC-based tools designed for boundary-scan test such as ASSET.

Device-vendor tools support only devices from that vendor and have limited scan path management support. Each tool has a unique user interface to learn and a unique connection to the board. These tools use the PC parallel port for access to the board. As a result, designs that use more than one device type require you to switch between vendor tools to program each device type.

ISC with ATE/ICT allows ISC to be integrated with test operations, but it is expensive. Time on ATE/ICT systems can cost as much as $1.00 per second and programming times typically range between 5 seconds and two minutes. Programming file sizes for ATE/ICT can also be very large, exceeding the capability of the testers.


SOLUTIONS
Implementing ISC with PC-based tools solves many of the problems associated with your other options. This is a universal solution, supporting devices from all major vendors via one user interface and one connection to the board. This also allows the integration of ISC and test on a low cost test platform (typical costs - $0.05 per second).

With sophisticated scan path management capabilities, the system provides safer scan path integrity testing and is able to maintain a board state that is safe for programming. It also enables ISC across complex scan paths such as system backplanes. Finally, using hardware optimized for boundary-scan application enables significant reduction in programming times.